MSM66573 datasheet(21/28 Pages) OKI

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PEDL66573-02

1Semiconductor

MSM66573 Family

21/28

(2) External data memory control

MSM66573L/Q573L (VDD=2.4 to 3.6 V, Ta=–30 to +70°C)

MSM66P573 (VDD=2.7 to 3.6 V, Ta=–30 to +70°C)

Parameter

Symbol

Condition

Min.

Max.

Unit

Cycle time

cyc

OSC=14 MHz

71.4

—

Clock pulse width (HIGH level)

tφWH

—

Clock pulse width (LOW level)

tφWL

—

RD pulse width

φ–25*1

—

WR pulse width

φ–25*1

—

RD pulse delay time

—75

WR pulse delay time

—75

Address setup time

φ–40

—

Address hold time

φ–8*2

—

Read data setup time

—

Read data hold time

0—

Read data access time

ACC

—

φ–120

Write data setup time

φ–40

—

Write data hold time

L=50 pF

φ–6

—

Note: t =tcyc/2

*1: MSM66P573=2t –20

*2: MSM66P573=t–6

tAH

tφWH

tφWL

cyc

RAP0 to 19

tRW

tRD

DIN0 to 7

tAS

ACC

CPUCLK

A0 to A19

D0 to D7

Bus timing during no wait cycle time

RAP0 to 19

DOUT0 to 7

A0 to A19

D0 to D7

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