Z86C34 datasheet(63/70 Pages) ZILOG

63 / 70 page

Z86C34/C35/C36/C44/C45/C46

ZiLOG

CMOS Z8® MCUs with ASCI UART

DS007601-Z8X0499

P R E L I M I N A R Y

Figure 50. Interrupt Request Register

(FAH: READ/WRITE)

Figure 51. Interrupt Mask Register

(FBH: READ/WRITE)

Figure 52. Flag Register

(FCH: READ/WRITE)

R250 IRQ

Inter Edge

P31

↓ P32 ↓ = 00

P31

↓ P32 ↑ = 01

P31

↑ P32 ↓ = 10

P31

↑↓ P32 ↑↓ = 11

IRQ0 = P32 Input

IRQ1 = P33 Input

IRQ2 = P31 Input

IRQ3 = P30 Input

IRQ4 = T0

IRQ5 = T1

1 Enables RAM Protect *

1 Enables IRQ0-IRQ5

(D0 = IRQ0)

1 Enables Interrupts

R251 IMR

* This option must be selected when ROM code is

submitted for ROM Masking, otherwise this control bit

is disabled permanently.

R252 FLAGS

User Flag F1 *

User Flag F2 *

Half Carry Flag

Decimal Adjust Flag

Overflow Flag

Sign Flag

Zero Flag

Carry Flag

* Not affected by reset

Figure 53. Register Pointer

(FDH: READ/WRITE)

Figure 54. Stack Pointer High

(FEH: READ/WRITE)

Figure 55. Stack Pointer Low

(FFH: READ/WRITE)

R253 RP

Expanded Register File

Working Register Pointer

Stack Pointer Upper

Byte (SP8 - SP15)

R254 SPH

Stack Pointer Lower

Byte (SP0 - SP7)

R255 SPL

Z86C34 Scheda tecnica(PDF) 63 Page - Zilog, Inc.

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