ADS5553IPFPR datasheet(20/24 Pages) TI

20 / 24 page

ADS5553

SLWS158 − FEBRUARY 2005

www.ti.com

CLOCK INPUT

The ADS5553 clock input can be driven with either a

differential clock signal or a single-ended clock input,

with little or no difference in performance between both

configurations. The common-mode voltage of the clock

inputs is set internally to CM using internal 5-kΩ

resistors that connect CLKP and CLKM to CM , as

shown in Figure 33.

5 kΩ

CLKP

5 kΩ

CLKM

6 pF

3 pF

Figure 33. Clock Inputs

When driven with a single-ended CMOS clock input, it

is best to connect CLKM to ground with a 0.01 µF

capacitor, while CLKP is ac-coupled with a 0.01 µF

capacitor to the clock source, as shown in Figure 34.

CLKP

ADS5553

CLKM

Square Wave or

Sine Wave

0.01 µF

Figure 34. AC-Coupled, Single-Ended Clock Input

The ADS5553 clock input can also be driven

differentially, reducing susceptibility to common-mode

noise. In this case, it is best to connect both clock inputs

to the differential input clock signal with 0.01 µF

capacitors, as shown in Figure 35.

CLKP

ADS5553

CLKM

Differential Square Wave

or Sine Wave

(3 Vp-p)

0.01 µF

Figure 35. AC-Coupled, Differential Clock Input

For high input frequency sampling, it is recommended

to use a clock source with low jitter. Additionally, the

internal ADC core uses both edges of the clock for the

conversion process. This means that, ideally, a 50%

duty cycle should be provided. Figure 24 shows the

performance variation of the ADC versus clock duty

cycle.

Bandpass filtering of the source can help produce a

50% duty cycle clock and reduce the effect of jitter.

When using a sinusoidal clock, the clock jitter further

improves as the amplitude is increased. In that sense,

using a differential clock allows for the use of larger

amplitudes without exceeding the supply rails and

absolute maximum ratings of the ADC clock input.

Figure 23 shows the performance variation of the

device versus input clock amplitude. For detailed

clocking schemes based on transformer or PECL-level

clocks,

see

the

ADS5553EVM

user’s guide

(SLWU010), available for download from www.ti.com.

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