CGS3311 datasheet(10/10 Pages) SS

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CMOS Clock Generator – CGS3311

Rev 1.1

06/05/19

Test Circuit

Test Conditions:

CL = 50 pF minimum or equivalent (includes test jig and probe capacitance)

RL = 500Ω or equivalent, RT = 50Ω or equivalent

Input signal from pulse generator: VIN = 0.0 V to 3.0 V; PRR ≤ 10 MHz ; tr ≤ 3.0 ns; tf ≤ 3.0ns

tr and tf and measured from 0.3 V to 2.7 V and from 2.7 V to 0.3 V, respectively; duty cycle = 50 percent

Timing parameters at a minimum input frequency of 1 MHz

DISCLAIMER: The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to

any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Silicon Supplies Ltd

hereby disclaims any and all warranties and liabilities of any kind.

LIFE SUPPORT POLICY: Silicon Supplies Ltd components may be used in life support devices or systems only with the express written

approval of Silicon Supplies Ltd, if a failure of such components can reasonably be expected to cause the failure of that life support device or system or

to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to

support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may

be endangered.

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