Selectable Low Voltage Lowpass/Bandpass Filter

Data Sheet

6/2014

Block Diagram________________

Digital Levels

All the clock and control pins are referenced

between VSS and VDD. In single supply appli-

cations, the digital levels should be CMOS lev-

els from VSS to VDD. The tertiary controls (pins

- TYPE and GAIN) should be set at VSS, VREF or

VDD depending on the filter type or gain de-

sired.

Ordering Information__________

Part Number

Package

MSLFSP

16 Pin DIP

MSLFSS

16 Pin SOIC

Absolute Maximum Ratings

Power Supply Voltage

+5V

Storage Temperature

-60 to +150 C

Operating Temperature

0 to 70 C

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Mixed Signal Integration Corporation reserves the right to to change any product or specification without notice at any time. Mixed Signal Integration

products are not designed or authorized for use in life support systems. Mixed Signal Integration assumes no responsibility for errors in this docu-

ment.

FSEL

TYPE

GAIN

MICOUT

MICIN

SCF

Out

Section

VREF

One

Clock

PD

Fo

CTVL

Adjustable

Gain

SCF

Section

Two

SCF

Section

Three

SCF

Lowpass

Buffer

Clock

Divider

Low

Voltage

Circuitry