MCP1726 datasheet(20/30 Pages) MICROCHIP

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MCP1726

DS21936B-page 20

Junction Temperature Estimate

To estimate the internal junction temperature, the

calculated temperature rise is added to the ambient or

offset temperature. For this example, the worst-case

junction temperature is estimated below:

As you can see from the result, this application will be

operating very near the maximum operating junction

temperature of 125°C. The PCB layout for this applica-

tion is very important as it has a significant impact on

the junction-to-ambient thermal resistance (R

θJA) of

the 3X3 DFN package, which is very important in this

application.

Maximum Package Power Dissipation at

70°C Ambient Temperature

From this table you can see the difference in maximum

allowable power dissipation between the 3X3 DFN

package and the 8-pin SOIC package. This difference

is due to the exposed metal tab on the bottom of the

DFN package. The exposed tab of the DFN package

provides a very good thermal path from the die of the

LDO to the PCB. The PCB then acts like a heatsink,

providing more area to distribute the heat generated by

the LDO.

TJ =TJRISE + TA(MAX)

TJ = 48.8°C + 70.0°C

TJ =118.8°C

3X3DFN (41° C/W R

θJA)

PD(MAX) = (125°C – 70°C) / 41° C/W

PD(MAX) = 1.34W

SOIC8 (150°C/Watt R

θJA)

PD(MAX) = (125°C – 70°C)/ 150° C/W

PD(MAX) = 0.366W

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