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GD25LE256DFIS Scheda tecnica(PDF) 27 Page - GigaDevice Semiconductor (Beijing) Inc. |
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GD25LE256DFIS Scheda tecnica(HTML) 27 Page - GigaDevice Semiconductor (Beijing) Inc. |
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27 / 83 page ![]() 1.8V Uniform Sector Dual and Quad Serial Flash GD25LE256D 27 Fast Read (0BH) in QPI mode The Fast Read command is also supported in QPI mode. In QPI mode, the number of dummy clocks is configured by the “Set Read Parameters (C0H)” command to accommodate a wide range application with different needs for either maximum Fast Read frequency or minimum data access latency. Depending on the Read Parameter Bits P[5:4] setting, the number of dummy clocks can be configured as either 4/6/8/8. Figure10a. Read Data Bytes at Higher Speed Sequence Diagram (QPI) CS# SCLK IO0 IO1 IO2 IO3 0 1 2 3 4 5 Command 0BH 20 12 16 8 6 7 8 9 10 4 4 0 0 4 0 4 0 4 21 13 17 9 5 5 1 1 5 1 5 1 5 22 14 18 10 6 6 2 2 6 2 6 2 6 23 15 19 11 7 7 3 3 7 3 7 3 7 A23-16 A15-8 A7-0 Dummy* 11 12 13 IOs switch from Input to output Byte1 *"Set Read Parameters" Command (C0H) can set the number of dummy clocks Dummy* Note: The device default is in 24-bit address mode. For 4-byte mode, the address length becomes 32-bit. |
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