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GD25LD40CPFG Scheda tecnica(PDF) 5 Page - GigaDevice Semiconductor (Beijing) Inc. |
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GD25LD40CPFG Scheda tecnica(HTML) 5 Page - GigaDevice Semiconductor (Beijing) Inc. |
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5 / 46 page ![]() Uniform Sector Standard and Dual Serial Flash GD25LD40C/20C 5 2. GENERAL DESCRIPTION The GD25LD40C/20C (4M/2M-bit) Serial flash supports the standard Serial Peripheral Interface (SPI), and supports the Dual Output: Serial Clock, Chip Select, Serial Data I/O0 (SI), O1 (SO). The Dual Output data is transferred with speed of 80Mbits/s. CONNECTION DIAGRAM CS# SO/ O1 WP# VSS Top View VCC NC SCLK SI/ IO0 8–LEAD TSSOP/SOP/DIP 1 2 3 4 5 6 7 8 Top View 8–LEAD WSON/USON 1 2 3 4 5 6 7 8 CS# SO/ O1 WP# VSS VCC NC SCLK SI/ IO0 PIN DESCRIPTION Pin Name I/O Description CS# I Chip Select Input SO (O1) O Data Output (Data Output 1) WP# I Write Protect Input VSS Ground SI (IO0) I/O Data Input (Data Input Output 0) SCLK I Serial Clock Input NC No Connection VCC Power Supply Note: CS# must be driven high if chip is not selected . Please don’t leave CS# floating any time after power is on. |
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