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IP178G Scheda tecnica(PDF) 49 Page - List of Unclassifed Manufacturers |
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IP178G Scheda tecnica(HTML) 49 Page - List of Unclassifed Manufacturers |
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49 / 76 page ![]() IP178G Data Sheet 49 / 76 December 19, 2012 Copyright © 2012, IC Plus Corp. IP178G-DS-R01.3 MII page6 register16 of PHY0 (8 PHYs share the MII register) page MII R/W Description Default PHY WOL+ MAC Address Register 1 6 16[15:0] R/W WOL+ MAC Address 1 WOL+ MAC Address = {WOL+_MAC_Address_0, WOL+_MAC_Address_1, WOL+_MAC_Address_2} 0x0000 MII page7 register16 of PHY0 (8 PHYs share the MII register) page MII R/W Description Default PHY WOL+ MAC Address Register 2 7 16[15:0] R/W WOL+ MAC Address 2 (the least significant word) WOL+ MAC Address = {WOL+_MAC_Address_0, WOL+_MAC_Address_1, WOL+_MAC_Address_2} 0x0000 The other Registers are reserved registers. User is inhibited to access to these registers. It may introduce abnormal function to write these registers. Example 1, Read page3 register16 (Read Data from page3 register16 of PHY address 0): 1. Write 0.20 = 0x0003 //page3 2. Read 0.16 //Read Data from page3 register16 3. Write 0.20 = 0x0000 //restore to page0 Example 2, Write page3 register16 = 0x3400 (Write Data 0x3400 to page3 register16 of PHY address 0): 1. Write 0.20 = 0x0003 //page3 2. Write 0.16 = 0x3400 //Write Data 0x3400 to page3 register16 3. Write 0.20 = 0x0000 //restore to page0 6.6 Register Page mode Control Register Table 14 Page control registers table MII register 20 of PHY0~7 (8 PHYs share the MII register) PHY MII R/W Description Default Page Control Register 0~7 20[4:0] RW Reg16~31_Page_Sel[4:0] 00000 The other Registers are reserved registers. User is inhibited to access to these registers. It may introduce abnormal function to write these registers. www.BDTIC.com/ICplus |
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