GD25Q40C datasheet(29/64 Pages) GIGADEVICE

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3.3V Uniform Sector

Dual and Quad Serial Flash

GD25Q40C

The Deep Power-Down command sequence: CS# goes low  sending Deep Power-Down command  CS# goes

high. The command sequence is shown in Figure22. CS# must be driven high after the eighth bit of the command code has

been latched in; otherwise the Deep Power-Down (DP) command is not executed. As soon as CS# is driven high, it requires

a delay of tDP before the supply current is reduced to ICC2 and the Deep Power-Down Mode is entered. Any Deep Power-

Down (DP) command, while an Erase, Program or Write cycle is in progress, is rejected without having any effects on the

cycle that is in progress.

Figure 24. Deep Power-Down Sequence Diagram

7.21.

Release from Deep Power-Down or High Performance Mode and Read

Device ID (RDI) (ABH)

The Release from Power-Down or High Performance Mode / Device ID command is a multi-purpose command. It can be

used to release the device from the Power-Down state or High Performance Mode or obtain the devices electronic

identification (ID) number.

To release the device from the Power-Down state or High Performance Mode, the command is issued by driving the

CS# pin low, shifting the instruction code

“ABH” and driving CS# high as shown in Figure26. Release from Power-Down

will take the time duration of tRES1 (See AC Characteristics) before the device will resume normal operation and other

c omma nd are accepted. The CS# pin must remain high during the tRES1 time duration.

When used only to obtain the Device ID while not in the Power-Down state, the command is initiated by driving the

CS# pin low and shifting the instruction code

“ABH” followed by 3-dummy byte. The Device ID bits are then shifted out on

the falling edge of SCLK with most significant bit (MSB) first as shown in Figure27. The Device ID value is listed in

Manufacturer and Device Identification table. The Device ID can be read continuously. The command is completed by

driving CS# high.

When used to release the device from the Power-Down state and obtain the Device ID, the command is the same

as previously described, and shown in Figure27, except that after CS# is driven high it must remain high for a time

duration of tRES2 (See AC Characteristics). After this time duration the device will resume normal operation and other

command will be accepted. If the Release from Power-Down / Device ID command is issued while an Erase, Program or

Write cycle is in process (when WIP equal 1) the command is ignored and will not have any effects on the current cycle.

Figure 25. Release Power-Down Sequence or High Performance Mode Sequence Diagram

Command

B9H

CS#

SCLK

tDP

Stand-by mode Deep Power-down mode

Command

ABH

CS#

SCLK

RES1

Stand-by mode

Deep Power-down mode

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