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SVRFL2800D - 10.0

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Page 9

SVRFL2800D Series

The INH2 (Inhibit 2) pin is a secondary-side control pin referenced to OUTCOM. The INH2 pin must also be driven in an open collector

or open drain configuration. Pulling INH2 low to OUTCOM disables the converter output. Internal control circuits, however, remain

active. The pin must be pulled below 1.0 V to disable the output. The INH2 pin should be left open if not used.

6.2.2 Adjusting the Output Voltage (TRIM)

The output voltage set point of the converter can be adjusted using the TRIM pin.

To adjust the output up, connect the trim resistor from TRIM to OUTCOM. To

adjust the output down, connect the trim resistor from TRIM to +VOUT. The

maximum trim range is -20% and +10% from nominal. The appropriate resistor

values versus the output voltage are given in the table below. Because the TRIM

pin can be sensitive to external noise, the trim resistor should be physically

located close to the SVRFL converter with short interconnects. The TRIM pin

should be left open if not used. When adjusting the output voltage, do not exceed

the rated total output power or output current.

SVRFL2805D

SVRFL2812D

SVRFL2815D

+Vout (V)

Rtrim

(Ω)

+ Vout (V)

Rtrim

(Ω)

+ Vout (V)

Rtrim

(Ω)

5.5

35k

13.2

5.8k

16.50

1.7k

5.4

47.5k

13.0

10k

16.25

5k

5.3

68.3k

12.8

16.2k

16.00

10k

5.2

110k

12.6

26.6k

15.75

18.3k

5.1

235k

12.4

47.3k

15.50

35k

5.0

12.2

109k

15.25

85k

4.9

225k

12.0

15.00

4.8

100k

11.8

454k

14.75

475k

4.7

58.3k

11.6

213k

14.50

225k

4.6

37.5k

11.4

134k

14.25

142k

4.5

25k

11.2

94k

14.00

100k

4.4

16.7k

11.0

70.1k

13.75

75k

4.3

10.7k

10.8

54.3k

13.50

58.3k

4.2

6.3k

10.6

42.9k

13.25

46.4k

4.1

2.8k

10.4

34.4k

13.00

37.5k

4.0

0

10.2

27.8k

12.75

30.6k

10.0

22.5k

12.50

25k

9.8

18.2k

12.25

20.5k

9.6

14.6k

12.00

16.7k

6.2.3 Frequency Synchronization (SYNCIN, SYNCOUT)

The SVRFL2800D Series will free run at a switching frequency of approximately 550 kHz, which has been set for optimum converter

performance. Frequency synchronization is not necessary unless required by system constraints. The SVRFL2800D Series provides a

frequency synchronization input (SYNCIN) and output (SYNCOUT), both referenced to INCOM.

The SYNCIN pin can be driven by an external clock or by the SYNCOUT pin of another SVRFL converter. The internal clock and

internal power train will operate at the frequency applied to the SYNCIN pin. The SYNC IN pin should be driven with a TTL type 5 V

square wave signal. The duty cycle of the square wave should be between 20% and 80%. The SYNCIN pin is internally capacitively-

coupled and the internal load is equivalent to 220 pF. Proper layout and circuit techniques are necessary to prevent noise from being

injected into this pin. Synchronized converters should located physically close together and share a low impedance INCOM connection.

The SYNCIN pin can be left open or connected to INCOM if not used.

The SYNCOUT pin provides a 5 V quasi-square wave output at either the SYNCIN frequency or the free-running frequency if SYNCIN

is not used. The SYNCOUT of a SVRFL can be connected to the SYNCIN pin of a second SVRFL to synchronize its switching

frequency to that of the first SVRFL. Similarly, the SYNCOUT of the second SVRFL can be connected to SYNCIN of a third SVRFL.

Subsequent SVRFL converters can be connected in this daisy chain arrangement as shown in the figure. SYNCOUT should be left

open if not used.

+

-

+

-

2.5V

Ri

10K

Rt

TRIM

10

(TRIM DOWN)

Rtrim

(TRIM UP)

Rtrim

+VOUT

7

OUTCOM

8

-VOUT

9