ADM3061E/ADM3062E/ADM3063E/ADM3065E/ADM3066E/ADM3067E/ADM3068E

Data Sheet

Rev. F | Page 12 of 28

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

RO

1

RE

2

DE

3

DI

4

8

B

7

A

6

GND

5

ADM3061E/

ADM3065E

TOP VIEW

(Not to Scale)

Figure 9. ADM3061E/ADM3065E 8-Lead Narrow Body SOIC_N Pin

Configuration

8

B

7

A

6

GND

5

ADM3061E/

ADM3065E

TOP VIEW

(Not to Scale)

Figure 10. ADM3061E/ADM3065E 8-Lead MSOP Pin Configuration

Table 7. ADM3061E/ADM3065E Pin Function Descriptions

Pin No.

Mnemonic

Description

1

RO

Receiver Output Data. This output is high when (A − B) ≥ −30 mV and low when (A − B) ≤ −200 mV. This output is

tristated when the receiver is disabled; that is, when RE is driven high.

2

RE

Receiver Enable Input. This is an active low input. Driving this input low enables the receiver and driving it high

disables the receiver.

3

DE

Driver Enable. A high level on this pin enables the driver differential outputs, A and B. A low level places the driver

output into a high impedance state.

4

DI

Transmit Data Input. Data to be transmitted by the driver is applied to this input.

5

GND

Ground.

6

A

put into a high impedance state to avoid overloading the bus.

7

B

into a high impedance state to avoid overloading the bus.

8