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OPA835 Scheda tecnica(PDF) 4 Page - Texas Instruments

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Il numero della parte OPA835
Spiegazioni elettronici  50-MHz, 170-關A, Negative-Rail In, Rail-to-Rail Out, Voltage-Feedback Amplifier
PDF  21 Pages
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Produttore elettronici  TI1 [Texas Instruments]
Homepage  http://www.ti.com
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OPA835 Scheda tecnica(HTML) 4 Page - Texas Instruments

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OPA2834
SBOS973 – JUNE 2019
www.ti.com
Product Folder Links: OPA2834
Submit Documentation Feedback
Copyright © 2019, Texas Instruments Incorporated
(1)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
VS is the total supply voltage given by VS = VS+ – VS–.
(3)
Staying below this ± supply turnon edge rate prevents the edge-triggered ESD absorption device across the supply pins from turning on.
(4)
Continuous input current limit for both the ESD diodes to supply pins and amplifier differential input clamp diodes. The differential input
clamp diodes limit the voltage across them to 1 V with this continuous input current flowing through them.
(5)
Long-term continuous current for electromigration limits.
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
(1)
MIN
MAX
UNIT
VS– to VS+
Supply voltage (total bipolar supplies)(2)
5.5
V
Supply turnon/off maximum dV/dT(3)
1
V/µs
VI
Input voltage
VS– – 0.5
VS+ + 0.5
V
VID
Differential input voltage
±1
V
II
Continuous input current(4)
±10
mA
IO
Continuous output current(5)
±20
mA
Continuous power dissipation
See Thermal Information
TJ
Maximum junction temperature
150
°C
TA
Operating free-air temperature
–40
125
°C
Tstg
Storage temperature
–65
150
°C
(1)
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2)
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.2 ESD Ratings
VALUE
UNIT
V(ESD)
Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
±1500
V
Charged-device model (CDM), per JEDEC specification
JESD22(2)
±1000
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
UNIT
VS+
Single-supply positive voltage
2.7
5
5.4
V
TA
Ambient temperature
–40
25
125
°C
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
7.4 Thermal Information
THERMAL METRIC(1)
OPA2834
UNIT
DGK (VSSOP)
8 PINS
RθJA
Junction-to-ambient thermal resistance
192.6
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
79.3
°C/W
RθJB
Junction-to-board thermal resistance
114.3
°C/W
ΨJT
Junction-to-top characterization parameter
15.7
°C/W
YJB
Junction-to-board characterization parameter
112.6
°C/W



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