4

COMMERCIALANDINDUSTRIALTEMPERATURERANGES

IDTCSPT857/A

2.5V PLL DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER

NOTES:

1. H = HIGH Voltage Level

L = LOW Voltage Level

Z = High-Impedance OFF-State

X = Don't Care

2. Additional feature that senses when the clock input is less than approximately 20MHz and places the part in sleep mode. Reciever inputs and PLL are turned off and outputs

= tristate.

INPUTS

OUTPUTS

PWRDWN

CLK

CLK

Y

Y

FBOUT

FBOUT

PLL

GND

H

L

H

L

H

L

H

Bypassed/OFF

GND

H

H

L

H

L

H

L

Bypassed/OFF

X

L

L

H

Z

Z

Z

Z

OFF

X

L

H

L

Z

Z

Z

Z

OFF

2.5V(nom)

H

L

H

L

H

L

H

ON

2.5V(nom)

H

H

L

H

L

H

L

ON

X

<20MHz

<20MHz

Z

Z

Z

Z

OFF

PIN DESCRIPTION (TSSOP)

Pin Name

Pin Number

Description

AGND

17

Ground for 2.5V analog supply

16

2.5V analog supply

CLK, CLK

13,14

Differentialclockinput

FBIN, FBIN

35,36

Feedbackdifferentialclockinput

FBOUT, FBOUT

32,33

Feedbackdifferentialclockoutput

GND

1, 7, 8, 18, 24, 25, 31, 41, 42, 48

Ground

PWRDWN

37

Output enable for Y and Y

4, 11, 12, 15, 21, 28, 34, 38, 45

2.5V supply

3, 5, 10, 20, 22, 27, 29, 39, 44, 46

Bufferedoutputofinputclock,CLK

2, 6, 9, 19, 23, 26, 30, 40, 43, 47

Bufferedoutputofinputclock,CLK

PIN DESCRIPTION (VFBGA)

Pin Name

Pin Number

Description

AGND

H1

Ground for 2.5V analog supply

G2

2.5V analog supply

CLK, CLK

F1, F2

Differentialclockinput

FBIN, FBIN

F5, F6

Feedbackdifferentialclockinput

FBOUT, FBOUT

H6, G5

Feedbackdifferentialclockoutput

GND

A3, A4, C1, C2, C5, C6, H2, H5, K3, K4

Ground

PWRDWN

E6

Output enable for Y and Y

B3, B4, E1, E2, E5, G1, G6, J3, J4

2.5V supply

A1, A6, B2, B5, D1, D6, J2, J5, K1, K6

Bufferedoutputofinputclock,CLK

A2, A5, B1, B6, D2, D5, J1, J6, K2, K5

Bufferedoutputofinputclock,CLK