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STR720 Scheda tecnica(PDF) 78 Page - STMicroelectronics |
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STR720 Scheda tecnica(HTML) 78 Page - STMicroelectronics |
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78 / 401 page ![]() STR720 - WAKE-UP INTERRUPT UNIT (WIU) 78/401 Wake-up Pending Register (WUPR) Address Offset: 0Ch Reset value: 0000h Bit 15:0 = WUP[15:0]: Wake-Up Pending bits The WUPx bits are Read/Clear, they are set by hardware on occurrence of the trigger event. They can be reset by software writing a ‘1’; writing a ‘0’ is ignored. 0: No Wake-Up trigger event occurred 1: Wake-Up Trigger event occurred 8.5 Register map Refer to Table 21 on page 50 for the base address. 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 WUP15 WUP14 WUP13 WUP12 WUP11 WUP10 WUP9 WUP8 WUP7 WUP6 WUP5 WUP4 WUP3 WUP2 WUP1 WUP0 rc rc rc rc rc rc rc rc rc rc rc rc rc rc rc rc Table 24. WIU Register Map Addr. Offset Register Name 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 0 WUCTRL Reserved STOP INT -EN WKUP -INT 4 WUMR WUMR[15:0] 8 WUTR WUTR[15:0] C WUPR WUPR[15:0] 1 |
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