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Motore di ricerca datesheet componenti elettronici |
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Motore di ricerca datesheet componenti elettronici |
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STR720 Scheda tecnica(PDF) 279 Page - STMicroelectronics |
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STR720 Scheda tecnica(HTML) 279 Page - STMicroelectronics |
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279 / 401 page  STR720 - USB SLAVE INTERFACE (USB) 279/401 19.6 Register Description The USB Peripheral registers can be divided into the following groups: • Common Registers: Interrupt and Control registers • Endpoint Registers: Endpoint configuration and status • Buffer Descriptor Table: Location of packet memory used to locate data buffers All register addresses are expressed as offsets with respect to the USB Peripheral registers base address 0xC000 8000, except the buffer descriptor table locations, which starts at the address specified by the USB_BTABLE register. Due to the common limitation of APB bridges on word addressability, all register addresses are aligned to 32-bit word boundaries although they are 16-bit wide. The same address alignment is used to access packet buffer memory locations, which are located starting from 0xC000 8800. In this section, the following abbreviations are used: read/write (rw) The software can read and write to these bits. read-only (r) The software can only read these bits. write-only (w) The software can only write to these bits. Read-clear (rc) The software can only read or clear this bit. Toggle (t) The software can only toggle this bit by writing ‘1’. Writing ‘0’ has no effect. 1 |
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