STR720 datasheet(377/401 Pages) STMICROELECTRONICS

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STR720 - ELECTRICAL CHARACTERISTICS

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28.3.2

Static Latch-Up (LU)

A supply overvoltage (applied to each power supply pin) and a current injection (applied to

each input, output and configurable I/O pin) are performed on each sample. After the test DC

parametric and functional testing is performed. This test conforms to the EIA/JESD 78 IC

latch-up standard.

28.4 Operating conditions

The following values are recommended to meet device functional specification.

For details on operating conditions related to CLK input buffer refer to section 28.7 on page 380.

For details on operating conditions related to PLL refer to section 28.10 on page 387.

For details on operating conditions related to A/D converter refer to section 28.11 on page 389.

Table 89. Electrical sensitivity

Symbol

Parameter

Conditions

JEDEC Level

Static latch-up class

TA=+25°C

Table 90. Recommended Operating Conditions

Symbol

Parameter

Value

Unit

Min.

Max

VDD3

3.3V Operating Digital Supply Voltage for the I/O pads.

3.0

3.6

VDD

1.8V Operating Digital Supply Voltage for core circuitry.

1.6

2.0

VDDRTC

1.8V Operating Digital Supply Voltage for RTC logic.

1.6

VDD

VDD3P

3.3V Operating Supply Voltage for CLK input buffer. 1)

3.0

3.6

VDDPLL

1.8 V Operating Supply Voltage for internal PLL. 2)

1.6

2.0

AVDD

Operating Analog Supply Voltage for A/D Converter. 3)

VDD3 -0.3

fSYS

Operating main clock frequency (core, AHB, S-APB)

MHz

fAPB

Operating peripheral clock frequency (A-APB)

MHz

Ambient temperature under bias

–40

+85

°C

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