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AT83C5127XXX-RATIM Scheda tecnica(PDF) 5 Page - ATMEL Corporation |
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AT83C5127XXX-RATIM Scheda tecnica(HTML) 5 Page - ATMEL Corporation |
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5 / 9 page ![]() 5 AT83C5127 7519A–SCR–04/05 D+ 29 29 DVCC I/O USB Positive Data Upstream Port This pin requires an external serial resistor of 33 Ω and a 1.5 K Ω pull- up to VREF for full speed configuration. D- 28 28 DVCC I/O USB Negative Data Upstream Port This pin requires an external serial resistor of 33 Ω VREF 30 30 AVCC O USB Voltage Reference: 3.0 < VREF < 3.6 V VREF can be connected to D+ through a 1.5 KΩ resistor. The VREF voltage is controlled by software. XTAL1 14 14 VCC I Input to the on-chip inverting oscillator amplifier To use the internal oscillator, a crystal or an external oscillator must be connected to this pin. XTAL2 15 15 VCC O Output of the on-chip inverting oscillator amplifier To use the internal oscillator, a crystal circuit must be connected to this pin. If an external oscillator is used, leave XTAL2 unconnected. PLLF 26 26 AVCC O PLL Low Pass Filter input Receives the RC network of the PLL low pass filter. AVCC 27 27 PWR Analog Supply Voltage AVCC is used to supply the internal 3.3V analog regulator which supplies the internal USB driver VCC 12 12 PWR Supply Voltage VCC is used to supply the internal 3.3V digital regulator which supplies the PLL, CPU core and internal I/O’s LI 10 10 PWR DC/DC Input LI supplies the current for the charge pump of the DC/DC converter. - LI tied directly to VCC : the DC/DC converter must be configured in regulator mode. - LI tied to VCC through an external 10µH coil : the DC/DC converter can be configured either in regulator or in pump mode. CVCC 9 9 PWR Card Supply Voltage CVCC is the ouput of internal DC/DC converter which supplies the Smart Card Interface. It must be connected to an external decoupling capacitor of 10 µF with the lowest ESR as this parameter influences on the CVCC noise DVCC 1 1 PWR Digital Supply Voltage DVCC is the output of the internal analog 3.3V regulator which supplies the USB driver. This pin must be connected to an external 680nF decoupling capacitor if the USB interface is used. CVSS 11 11 GND DC/DC Ground CVSS is used to sink high shunt currents from the external coil VSS 8 8 GND Digital Ground VSS is used to supply the PLL, buffer ring and the digital core AVSS 25 25 GND Analog Ground AVSS is used to supply the USB driver. Table 1. Pin Description (Continued) Port Internal Power Supply ESD I/O Reset Level Alt Reset Config Conf 1 Conf 2 Conf 3 Led |
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