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PTH12060LAH Scheda tecnica(PDF) 2 Page - Texas Instruments |
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PTH12060LAH Scheda tecnica(HTML) 2 Page - Texas Instruments |
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2 / 29 page ![]() www.ti.com Margin Down Margin Up V I C 560 F (Required) I m C1 330 F (Optional) O m C2 Ceramic (Optional) O Inhibit GND GND V O V Sense O Track 1 2 10 7 6 5 4 3 98 R, 1% (Required) SET L O A D PTH12060W/L SLTS217D–MAY 2003–REVISED OCTOBER 2005 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. STANDARD APPLICATION A. RSET = Required to set the output voltage to a value higher than the minimum value. See the Application Information section for values. ORDERING INFORMATION PTH12060 (Base Part Number) Output Voltage Range Part Number (1) DESCRIPTION Pb – free and Mechanical RoHS Package (2) PTH12060WAH Horizontal T/H Yes (3) EUW 1.2 V–5.5 V (Adjustable) PTH12060WAS Standard SMD No (4) EUY PTH12060WAZ Optional SMD Yes (3) EUY PTH12060LAH Horizontal T/H Yes (3) EUW 0.8 V–1.8 V (Adjustable) PTH12060LAS Standard SMD No (4) EUY PTH12060LAZ Optional SMD Yes (3) EUY (1) Add T to end of part number for tape and reel on SMD packages only. (2) Reference the applicable package reference drawing for the dimensions and PC board layout. (3) Lead (Pb) – free option specifies Sn/Ag pin solder material. (4) Standard option specifies 63/37, Sn/Pb pin solder material. 2 |
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