PDTA113EMB

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© NXP B.V. 2012. All rights reserved.

Product data sheet

Rev. 1 — 4 April 2012

3 of 12

NXP Semiconductors

PDTA113EMB

PNP resistor-equipped transistor; R1 = 1 k

Ω, R2 = 1 kΩ

5.

Limiting values

[1]

Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard footprint.

[2]

Reflow soldering is the only recommended soldering method.

Table 5.

Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol

Parameter

Conditions

Min

Max

Unit

collector-base voltage

open emitter

-

-50

V

collector-emitter voltage

open base

-

-50

V

emitter-base voltage

open collector

-

-10

V

input voltage

positive

-

10

V

negative

-

-10

V

output current

-

-100

mA

peak collector current

-

-100

mA

total power dissipation

[1][2]

-

250

mW

junction temperature

-

150

°C

ambient temperature

-65

150

°C

storage temperature

-65

150

°C

FR4 PCB, standard footprint

Fig 2.

Power derating curve for DFN1006B-3 (SOT883B)

-75

175

125

25

75

-25

006aad009

100

200

300

(mW)

0