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IP4787CZ32 Scheda tecnica(PDF) 4 Page - Nexperia B.V. All rights reserved |
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IP4787CZ32 Scheda tecnica(HTML) 4 Page - Nexperia B.V. All rights reserved |
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4 / 36 page ![]() IP4787CZ32 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved. IP4787CZ32 Rev. 3 — 19 December 2014 3 of 35 NXP Semiconductors IP4787CZ32 DVI and HDMI interface ESD and overcurrent protection 2. Pinning information 2.1 Pinning 2.2 Pin description Fig 1. Pin configuration IP4787CZ32 Table 1. Pin description Pin Name Description 1 TMDS_D2+_SYS TMDS to ASIC inside system 2TMDS_D2 _SYS TMDS to ASIC inside system 3 TMDS_D1+_SYS TMDS to ASIC inside system 4TMDS_D1 _SYS TMDS to ASIC inside system 5 TMDS_D0+_SYS TMDS to ASIC inside system 6TMDS_D0 _SYS TMDS to ASIC inside system 7 TMDS_CK+_SYS TMDS to ASIC inside system 8TMDS_CK _SYS TMDS to ASIC inside system 9 DDC_CLK_SYS DDC clock system side 10 DDC_DAT_SYS DDC data system side 11 VCC(5V0) 5 V supply input 12 HOTPLUG_CON hot plug output to connector 13 HDMI_5V0_CON 5 V input from connector 14 DDC_DAT_CON DDC data connector side |
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