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Motore di ricerca datesheet componenti elettronici |
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Motore di ricerca datesheet componenti elettronici |
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SAFC161PI Scheda tecnica(PDF) 70 Page - Infineon Technologies AG |
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SAFC161PI Scheda tecnica(HTML) 70 Page - Infineon Technologies AG |
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70 / 400 page  &3, 7KH &HQWUDO 3URFHVVLQJ 8QLW &38 User’s Manual 4-22 1999-08 Code memory addresses are generated by directly extending the 16-bit contents of the IP register by the contents of the CSP register as shown in the figure below. In case of the segmented memory mode the selected number of segment address bits (via bitfield SALSEL) of register CSP is output on the respective segment address pins of Port 4 for all external code accesses. For non-segmented memory mode or Single Chip Mode the content of this register is not significant, because all code acccesses are automatically restricted to segment 0. Note: The CSP register can only be read but not written by data operations. It is, however, modified either directly by means of the JMPS and CALLS instructions, or indirectly via the stack by means of the RETS and RETI instructions. Upon the acceptance of an interrupt or the execution of a software TRAP instruction, the CSP register is automatically set to zero. Figure 4-5 Addressing via the Code Segment Pointer Note: When segmentation is disabled, the IP value is used directly as the 16-bit address. |
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