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CS42436 Scheda tecnica(PDF) 52 Page - Cirrus Logic |
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CS42436 Scheda tecnica(HTML) 52 Page - Cirrus Logic |
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52 / 66 page ![]() 52 DS647PP2 8 APPENDIX A: EXTERNAL FILTERS 8.1 ADC Input Filter The analog modulator samples the input at 6.144 MHz (internal MCLK=12.288 MHz). The digital filter will reject signals within the stopband of the filter. However, there is no rejection for input signals which are multiples of the digital passband frequency (n × 6.144 MHz), where n=0,1,2,... Refer to Figures 20 and 21 for a recommended analog input filter that will attenuate any noise energy at 6.144 MHz, in addition to providing the optimum source impedance for the modulators. Refer to Figures 22 and 23 for low cost, low component count passive input filters. The use of capacitors which have a large voltage coefficient (such as general-purpose ceramics) must be avoided since these can degrade signal linearity. VA + + - - 4.7 µF 100 k Ω 10 k Ω 100 k Ω 100 k Ω 0.1 µF 100 µF 470pF 470 pF C0G C0G 634 Ω 634 Ω 634 Ω 91 Ω 91 Ω 2700 pF C0G 332 Ω AINx+ AINx- ADC1-3 Figure 20. Single to Differential Active Input Filter - + 470 pF C0G 634 Ω 91 Ω 2700 pF C0G 4.7 µF 100 k Ω 100 k Ω 100 k Ω VA 4.7 µF AIN1+,2+,3+,4+ AIN1-,2-,3-,4- ADC1-2 ADC3 - + 470 pF C0G 634 Ω 91 Ω 2700 pF C0G 4.7 µF 100 k Ω 100 k Ω 100 k Ω VA AIN5A,6A - + 470 pF C0G 634 Ω 91 Ω 2700 pF C0G 4.7 µF 100 k Ω 100 k Ω 100 k Ω VA AIN5B,6B Figure 21. Single-Ended Active Input Filter |
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