AM652X datasheet(184/277 Pages) TI1

184 / 277 page

GPMC_FCLK

GPMC_CLK

GPMC_CSn[x]

GPMC_A[MSB:1]

GPMC_BE0n_CLE

GPMC_BE1n

GPMC_ADCn_ALE

GPMC_OEn_REn

GPMC_AD[15:0]

GPMC_WAIT[x]

Address 0

Address 1

Valid

Data Upper

FA9

FA10

FA3

FA9

FA3

FA13

FA1

FA4

FA12

FA10

FA0

FA16

FA0

FA10

FA5

GPMC_07

184

AM6548, AM6528, AM6546

AM6526, AM6527

SPRSP08I – NOVEMBER 2017 – REVISED DECEMBER 2019

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Specifications

In GPMC_CSn[x], x is equal to 0, 1, 2 or 3. In GPMC_WAIT[x], x is equal to 0 or 1.

FA5 parameter illustrates amount of time required to internally sample input data. It is expressed in number of GPMC

functional clock cycles. From start of read cycle and after FA5 functional clock cycles, input data will be internally

sampled by active functional clock edge. FA5 value must be stored inside AccessTime register bits field.

GPMC_FCLK is an internal clock (GPMC functional clock) not provided externally.

Figure 5-50. GPMC and NOR Flash—Asynchronous Read—32-Bit

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