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AM652X Scheda tecnica(PDF) 118 Page - Texas Instruments |
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AM652X Scheda tecnica(HTML) 118 Page - Texas Instruments |
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118 / 277 page ![]() 118 AM6548, AM6528, AM6546 AM6526, AM6527 SPRSP08I – NOVEMBER 2017 – REVISED DECEMBER 2019 www.ti.com Submit Documentation Feedback Product Folder Links: AM6548 AM6528 AM6546 AM6526 AM6527 Terminal Configuration and Functions Copyright © 2017–2019, Texas Instruments Incorporated Table 4-76. Unused Balls Specific Connection Requirements (continued) BALL NUMBER BALL NAME CONNECTION REQUIREMENTS F21 VPP_CORE This ball must be left unconnected if unused. T6 VPP_MCU F23 MMC1_CALPAD D24 MMC0_CALPAD AG5 SERDES0_REFCLKN AG6 SERDES0_REFCLKP AC9 SERDES0_REFRES AH3 SERDES0_RXN AG2 SERDES0_RXP AH4 SERDES0_TXN AG3 SERDES0_TXP AH6 SERDES1_REFCLKN AH7 SERDES1_REFCLKP AC14 SERDES1_REFRES AG9 SERDES1_RXN AH10 SERDES1_RXP AH9 SERDES1_TXN AG8 SERDES1_TXP (1) To determine which power supply is associated with any IO refer to Table 4-1, Pin Attributes. Table 4-77. Reserved Balls Specific Connection Requirements BALLS CONNECTION REQUIREMENTS AA6 (RSV2), B1 (RSV3), AC23 (RSV4), C12 (RSV5), F9 (RSV6), F10 (RSV7), AD10 (RSV8), AC13 (RSV9), B28 (RSV10), A27 (RSV11), D23 (RSV12), E23 (RSV13), W6 (TEMP_DIODE_P), F16 (DDR_FS_RESETn) These balls must be left unconnected. V4 (RSV1) These balls must be connected to VSS through a separate external pull resistor to ensure these balls are held to a valid logic low level. NOTE All other unused signal balls with a Pad Configuration Register can be left unconnected with their multiplexing mode set to GPIO input and internal pulldown resistor enabled. Unused balls are defined as those which only connect to a PCB solder pad. This is the only use case where internal pull resistors are allowed as the only source/sink to hold a valid logic level. Any balls connected to a via, test point, or PCB trace are considered used and must not depend on the internal pull resistor to hold a valid logic level. Internal pull resistors are weak and may not source enough current to maintain a valid logic level for some operating conditions. This may be the case when connected to components with leakage to the opposite logic level, or when external noise sources couple to signal traces attached to balls which are only pulled to a valid logic level by the internal resistor. Therefore, external pull resistors may be required to hold a valid logic level on balls with external connections. If balls are allowed to float between valid logic levels, the input buffer may enter a high- current state which could damage the IO cell. |
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