Datasheet

10 of 24

V 2.21

www.infineon.com/soi

2020-07-07

2ED2181 (4) S06F (J)

650 V high-side and low-side driver with integrated bootstrap diode

5.3

Matched propagation delays

The 2ED2181 (4) S06F (J) is designed with propagation delay matching circuitry. With this feature, the IC’s

both the low-side channels and the high-side channels; the maximum difference is specified by the delay

Figure 8

Delay matching waveform definition

5.4

Input logic compatibility

The input pins of are based on a TTL and CMOS compatible input-threshold logic that is independent of the Vcc

little temperature variation as summarized in Figure 9, the input pins are conveniently driven with logic level

PWM control signals derived from 3.3 V and 5 V digital power-controller devices. Wider hysteresis (typically

0.9

V) offers enhanced noise immunity compared to traditional TTL logic implementations, where the hysteresis is

typically less than 0.5 V. 2ED218x family also features tight control of the input pin threshold voltage levels which

eases system design considerations and ensures stable operation across temperature. The 2ED218x features

floating input protection wherein if any of the input pin is left floating, the output of the corresponding stage is

held in the low state. This is achieved using pull-down resistors on all the input pins (HIN, LIN) as shown in the

block diagram. The 2ED218x family has input pins that are capable of sustaining voltages higher than the bias

voltage applied on the Vcc pin of the device.

Figure 9

HIN & LIN input thresholds