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TLV9302IDDFR Scheda tecnica(PDF) 29 Page - Texas Instruments |
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TLV9302IDDFR Scheda tecnica(HTML) 29 Page - Texas Instruments |
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29 / 49 page ![]() V- OUT GND GND GND NC ±IN +IN V± V+ OUTPUT NC NC VS+ VS± GND Ground (GND) plane on another layer VOUT VIN GND Run the input traces as far away from the supply lines as possible RF RG Place components close to device and to each other to reduce parasitic errors Use low-ESR, ceramic bypass capacitor GND Use a low-ESR, ceramic bypass capacitor 29 TLV9301, TLV9302, TLV9304 www.ti.com SBOS941B – FEBRUARY 2019 – REVISED MARCH 2020 Product Folder Links: TLV9301 TLV9302 TLV9304 Submit Documentation Feedback Copyright © 2019–2020, Texas Instruments Incorporated Layout Example (continued) Figure 54. Operational Amplifier Board Layout for Noninverting Configuration Figure 55. Example Layout for SC70 (DCK) Package |
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