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USB7002 Scheda tecnica(PDF) 43 Page - Microchip Technology |
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USB7002 Scheda tecnica(HTML) 43 Page - Microchip Technology |
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43 / 56 page ![]() 2018-2019 Microchip Technology Inc. DS00002670D-page 43 USB7002 9.5 DC Specifications 4: 0.42V for interface using open drain with pull-ups to voltages up to 2.1V, 0.34V for interface using open drain with pull-ups to voltages greater than 2.1V. 5: XTALI can optionally be driven from a 25 MHz singled-ended clock oscillator. 6: Refer to the USB 3.1 Gen 1 Specification for USB DC electrical characteristics. TABLE 9-3: I/O DC ELECTRICAL CHARACTERISTICS Parameter Symbol Min Typical Max Units Notes I Type Input Buffer Low Input Level High Input Level VIL VIH 1.25 Note 4 V V IS Type Input Buffer Low Input Level High Input Level Schmitt Trigger Hysteresis (VIHT - VILT) VIL VIH VHYS 1.25 100 160 Note 4 240 V V mV O12 Type Output Buffer Low Output Level High Output Level VOL VOH VDD33-0.4 0.4 V V IOL = 12 mA IOH = -12 mA OD12 Type Output Buffer Low Output Level VOL 0.4 V IOL = 12 mA ICLK Type Input Buffer (XTALI Input) Low Input Level High Input Level VIL VIH 0.9 0.35 1.2 V V Note 5 IO-U Type Buffer ( See Note 6) Note 6 |
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