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AS7000 Scheda tecnica(PDF) 54 Page - ams AG |
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AS7000 Scheda tecnica(HTML) 54 Page - ams AG |
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54 / 92 page ![]() Page 54 ams Datasheet Document Feedback [v1-12] 2018-Feb-26 AS7000 − Detailed Description ADC The ADC is a 14bit successive-approximation register (SAR) type. It supports 12 bit with very fast conversion time up to 1Msps and 14bit with moderate conversion time up to 250ksps. The ADC is started by the sequencer and its timing or in manual mode (man_mode=1) by setting seq_start=1 (seq_start stays ‘1’ as long as the conversion runs). The AS7000 can be configured to trigger an interrupt upon end of conversion. Figure 66: ADC Internal Circuit and Multiplexer For best accuracy the ADC needs to recalibrate itself – use ams SDK to initiate the calibration procedure. CPU LDO VDD POR GPIO8 GPIO7 S R Q V_LDO gpio7_wakeup_en |
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