ADC32RF83 datasheet(69/138 Pages) TI

69 / 138 page

R/W, M, P, CH, Bits Decoder

Initiate an SPI Cycle

Program

Decimation

Filter Page for

ChA

(2)

(DDC modes)

M=1,P=0, CH=1,

A11=0, A10=0

Addr

00h

(3)

M = 1

Addr

3Ah

M = 0

Analog Bank

Digital Bank

st SPI Cycle:

Page Selection

nd SPI Cycle:

Page Programing

Program

Power

Detector Page

for ChA

(3)

Addr

00h

(3)

Addr

25h

M=1,P=0, CH=1,

A11=1, A10=0

Program

Power

Detector Page

for ChB

(3)

Addr

00h

(3)

Addr

25h

Program

Decimation

Filter Page for

ChB

(2)

(DDC modes)

Addr

00h

(3)

Addr

3Ah

M=1,P=0, CH=1,

A11=0, A10=1

M=1,P=0, CH=1,

A11=1, A10=1

SPI cycle

(1):

These pages

are directly

programmed

in one SPI

cycle.

R/W

SDIN

SCLK

SEN

A11

A10

SPI Cycle

Direct Addressing Pages

ADC32RF80, ADC32RF83

www.ti.com

SBAS774A – MAY 2016 – REVISED DECEMBER 2016

Product Folder Links: ADC32RF80 ADC32RF83

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(1)

Registers in the decimation filter page and the power detector page can be directly programmed in one SPI cycle.

(2)

To program registers in the decimation filter page, aet M = 1, CH = 1, A[10] = 0, and A[11] = 0 or 1 for channel A or B. Addressing begins at 50xx for channel A and

58xx for channel B.

(3)

To program registers in power detector page, set M = 1, CH = 1, A[10] = 1, and A[11] = 0 or 1 for channel A or B. Addressing begins at 54xx for channel A and 5Cxx for

channel B.

Figure 144. SPI Registers: Direct Addressing

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