List of figures

Figure 2.

Block diagram .................................................................... 2

Figure 3.

Pin connection (top view) ............................................................. 7

Figure 4.

Typical application schematic .......................................................... 8

Figure 5.

STCK and DIR timing .............................................................. 10

Figure 6.

Mode selection example ............................................................ 10

Figure 7.

PWM current control sequence ........................................................ 14

Figure 8.

OFF time regulation circuit ........................................................... 14

Figure 9.

OFF time vs. ROFF value ............................................................ 15

Figure 10.

Overcurrent and short-circuit protection management ........................................ 16

Figure 11.

Disable time versus REN and CEN values (VDD = 3.3 V) ....................................... 17

Figure 12.

Disable time versus REN and CEN values (VDD = 1.8 V) ....................................... 17

Figure 13.

Thermal shutdown management ....................................................... 18

Figure 14.

Power stage resistance versus supply voltage ............................................. 19

Figure 15.

Power stage resistance versus temperature ............................................... 19

Figure 16.

Overcurrent threshold versus supply voltage .............................................. 20

Figure 17.

VFQFPN 3x3x1.0 16L package outline .................................................. 21

Figure 18.

VFQFPN 3x3x1.0 16L recommended footprint ............................................. 22

STSPIN220

List of figures

DS11633 - Rev 4

page 26/27