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P2005A Scheda tecnica(PDF) 3 Page - Alliance Semiconductor Corporation |
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P2005A Scheda tecnica(HTML) 3 Page - Alliance Semiconductor Corporation |
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3 / 10 page ![]() October 2003 P2005X rev 1.0 General purpose EMI Reduction IC 3 of 10 Notice: The information in this document is subject to change without notice. Spread Spectrum The Output Frequency Selection Table and the Frequency Deviations Selections Table illustrate the two possible spread spectrum options. The optimal setting should minimize system EMI to the fullest without affecting system performance. The spreading is described as a percentage deviation of the center frequency (Note: The center frequency is the frequency of the external reference input on CLKIN, Pin1). Example: The P2005X is designed for communications, digital video and imaging applications. It is not only optimized for operation in the 8MHz – 32MHz range, but its output frequency can be extended down to one half of the input clock frequency using the divide-by-two feature. This feature extends low frequency as low as to 4MHz. Setting Pin 3 low (DIV2 = 0; Divide-by-two mode) sets the output frequency (ModOUT) to half the frequency of the input clock (CLKIN). This is a simple way to generate a spread spectrum modulated low frequency clock when only a higher frequency signal is available. If you want the output frequency to be the same as the input, you can either set DIV2=1 or leave it unconnected. Selecting the P2005X’s spread options is a matter of either setting SR0=1 or SR0=0. Setting SR0=0 set as a lower modulation spread, while setting it to 1 introduces a wider spectral spread in the output clock. Refer Modulation output and Spreading Selections Tables. The example given in the figure below shows the device set to the divide-by-two mode (DIV2=0) with a lower spectrum range (SR0=0). The versatility provided by allowing both clock division and spread spectrum on one chip is already proving to be a popular solution among leading system manufacturers. P2005X Application Schematic 1 2 3 4 CLKIN XOUT DIV2 VSS MODOUT 5 6 7 8 SR0 SSON# VDD 8.832MHz Crystal Modulated 4.416MHz is connected to CLK input pin of the system +3.3V 0.1µF P2005X |
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