SN74HCS237 datasheet(14/20 Pages) TI

Il numero della parte	SN74HCS237

Spiegazioni elettronici	SN74HCS237 3- to 8-Line Decoder/Demultiplexer with Address Latches and Schmitt-Trigger Inputs

PDF	20 Pages

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Produttore elettronici	TI [Texas Instruments]

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2. Ensure the capacitive load at the output is ≤ 50 pF. This is not a hard limit, however it will ensure optimal

performance. This can be accomplished by providing short, appropriately sized traces from the SN74HCS237

to the receiving device(s).

3. Ensure the resistive load at the output is larger than (VCC / IO(max)) Ω. This will ensure that the maximum

output current from the Absolute Maximum Ratings is not violated. Most CMOS inputs have a resistive load

measured in megaohms; much larger than the minimum calculated above.

4. Thermal issues are rarely a concern for logic gates, however the power consumption and thermal increase

can be calculated using the steps provided in the application report, CMOS Power Consumption and Cpd

Calculation.

9.2.3 Application Curve

A[2:0]

Y[7:0]

b000

0x00

0x04

b010

b111

0x80

b001

0x02

b101

b100

0x10

0x00

Figure 9-2. Application timing diagram

SN74HCS237

SCLS834 – SEPTEMBER 2020

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SN74HCS237 Scheda tecnica(PDF) 14 Page - Texas Instruments