W5100S datasheet(5/110 Pages) WIZNET

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W5100S Datasheet Version1.2.5

5 / 110

Contents

1 PIN Description ........................................................................................ 11

1.1

PIN Description ............................................................................. 12

2 Memory Map ............................................................................................ 16

2.1

W5100S Registers........................................................................... 18

2.1.1

Common registers.................................................................... 18

2.1.2

SOCKET Registers .................................................................... 20

3 Register Descriptions ................................................................................. 22

3.1

Common Registers ......................................................................... 23

3.1.1

MR (Mode Register) .................................................................. 23

3.1.2

GWR (Gateway IP Address Register) .............................................. 23

3.1.3

SUBR (Subnet Mask Register) ...................................................... 23

3.1.4

SHAR (Source Hardware Address Register) ...................................... 24

3.1.5

SIPR (Source IP Address Register) ................................................. 24

3.1.6

INTPTMR (Interrupt Pending Time Register) .................................... 24

3.1.7

IR (Interrupt Register)............................................................... 24

3.1.8

IMR (Interrupt Mask Register)...................................................... 25

3.1.9

RTR (Retransmission Time Register).............................................. 26

3.1.10

RCR (Retransmission Count Register)............................................. 26

3.1.11

RMSR (RX Memory Size Register) .................................................. 26

3.1.12

TMSR (TX Memory Size Register) .................................................. 27

3.1.13

IR2 (Interrupt Register 2)........................................................... 27

3.1.14

IMR2 (Interrupt Mask Register 2) .................................................. 28

3.1.15

PTIMER (PPP Link Control Protocol Request Timer Register) ................ 28

3.1.16

PMAGIC (PPP Link Control Protocol Magic number Register)................. 28

3.1.17

UIPR (Unreachable IP Address Register) ......................................... 29

3.1.18

UPORTR (Unreachable Port Register) ............................................ 29

3.1.19

MR2 (Mode Register 2) .............................................................. 29

3.1.20

PHAR (Destination Hardware Address Register on PPPoE) .................... 30

3.1.21

PSIDR (Session ID Register on PPPoE)............................................. 31

3.1.22

PMRUR (PPPoE Maximum Receive Unit Register) ............................... 31

3.1.23

PHYSR0 (PHY Status Register0) .................................................... 31

3.1.24

PHYSR1 (PHY Status Register 1) ................................................... 32

3.1.25

PHYRAR (PHY Register Address Register) ........................................ 33

3.1.26

PHYDIR (PHY Data Input Register) ................................................ 33

3.1.27

PHYDOR (PHY Data Output Register) ............................................. 33

3.1.28

PHYACR (PHY Access Control Register) .......................................... 33

3.1.29

PHYDIVR (PHY Division Register) .................................................. 34

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