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W6100 Scheda tecnica(PDF) 29 Page - WIZnet Co., Ltd |
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W6100 Scheda tecnica(HTML) 29 Page - WIZnet Co., Ltd |
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29 / 149 page ![]() W6100 – Hardwired Dual TCP/IP Stack Controller 29/149 SUBR Subnet Mask Register SIPR Source IP Address Register IPv6 LLAR Link Local Address Register GUAR Global Unicast Address Register SUB6R IPv6 Subnet Prefix Register GA6R IPv6 Gateway IP Address It is excluded from lock mechanism * CAUTION : GA6R can be set regardless of setting of NETL. 5 PHYL PHY Lock Status PHY Lock can be set by PHYLCKR(PHY Configuration Lock Register). 0: Unlock – possible to set PHYC0R, PHYC1R 1: Lock – unable to set PHY Control Register (PHYC0R, PHYC1R) [4:2] - Reserved 1 IND Parallel BUS Interface Mode 0: Others 1: PIN MODE[3:0] = “010X” 0 SPI SPI Interface Mode 0: Others 1: PIN MODE[3:0] = “000X” 4.1.4 SYCR0 (System Config Register 0) [WO][0x2004] [0x80] SYCR0 softly resets to W6100 SYCR0 can be set in case of only SYSR[CHPL] = ‘0’ . 7 6 5 4 3 2 1 0 RST - - - - - - - WO Bit Symbol Description 7 RST Software Reset W6100 S/W reset. All registers are initialized. 0 : W6100 reset 1 : Normal operation [6:0] - Reserved |
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