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MAS3549F Scheda tecnica(PDF) 35 Page - Micronas |
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MAS3549F Scheda tecnica(HTML) 35 Page - Micronas |
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35 / 92 page ![]() DATA SHEET MAS 35x9F Micronas June 30, 2004; 6251-505-1DS 35 D0:349 Output Clock Configuration (affects pin CLKO) (reset = 80000 hex) All bit[19] CLKO configuration 0 output clock signal at CLKO 1 (reset) CLKO is tristate The CLKO output pin of the MAS 35x9F can be disabled via bit[19]. bit[18] Reserved, must be set to zero bit[17] Additional division by 2 if scaler is on (bit[8] cleared) 0 (reset) oversampling factor 512/768 1 oversampling factor 256/384 bit[16:9] Reserved, must be set to zero bit[8] Output clock scaler 0 (reset) set output clock according to audio sample rate (see Table 2–1) 1 output clock fixed at 24.576 or 22.5792 MHz For a list of output frequencies at pin CLKO please refer to Table 2–1. bit[7:0] reserved, must be set to zero Changes at this memory address must be validated by setting bit[0] of D0:346. OutClkConfig D0:350 Soft Mute MPEG %0 (reset) mute off %1 mute on SoftMute D0:351 S/PDIF channel status bits category code setting (reset = 8200 hex) All SpdOutBits Table 3–9: D0 control memory cells, continued Memory Address (hex) Function Name |
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