MWCT1004AFVLLPR datasheet(26/65 Pages) NXP

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System Clock Generation (SCG) specifications

6.2.3.1 Fast internal RC Oscillator (FIRC) electrical specifications

Table 17. Fast internal RC Oscillator electrical specifications

Symbol

Parameter1

Value

Unit

Min.

Typ.

Max.

FFIRC

FIRC target frequency

—

MHz

ΔF

Frequency deviation across process, voltage, and

temperature < 105°C

—

±0.5

±1

%FFIRC

ΔF125

Frequency deviation across process, voltage, and

temperature < 125°C

—

±0.5

±1.1

%FFIRC

TStartup

Startup time

3.4

µs2

TJIT, 3

Cycle-to-Cycle jitter

—

250

500

TJIT3

Long term jitter over 1000 cycles

—

0.04

0.1

%FFIRC

1. With FIRC regulator enable

2. Startup time is defined as the time between clock enablement and clock availability for system use.

3. FIRC as system clock

NOTE

Fast internal RC Oscillator is compliant with CAN and LIN

standards.

6.2.3.2 Slow internal RC oscillator (SIRC) electrical specifications

Table 18. Slow internal RC oscillator (SIRC) electrical specifications

Symbol

Parameter

Value

Unit

Min.

Typ.

Max.

FSIRC

SIRC target frequency

—

MHz

ΔF

Frequency deviation across process, voltage, and

temperature < 105°C

—

±3

%FSIRC

ΔF125

Frequency deviation across process, voltage, and

temperature < 125°C

—

±3.3

%FSIRC

TStartup

Startup time

—

12.5

µs1

1. Startup time is defined as the time between clock enablement and clock availability for system use.

6.2.3

System Clock Generation (SCG) specifications

MWCT101XS Data Sheet, Rev. 3, 12/2019

NXP Semiconductors

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