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STM8S003F3 Scheda tecnica(PDF) 92 Page - STMicroelectronics |
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STM8S003F3 Scheda tecnica(HTML) 92 Page - STMicroelectronics |
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92 / 103 page ![]() Package information STM8S003F3 STM8S003K3 92/103 DS7147 Rev 10 Figure 48. TSSOP20 – 20-lead thin shrink small outline, 6.5 x 4.4 mm, 0.65 mm pitch, package footprint 1. Dimensions are expressed in millimeters. Device marking for TSSOP20 The following figure gives an example of topside marking orientation versus pin 1 identifier location. Other optional marking or inset/upset marks, which identify the parts throughout supply chain operations, are not indicated below. Figure 49. TSSOP20 marking example (package top view) 1. Parts marked as "ES", "E" or accompanied by an Engineering Sample notification letter, are not yet qualified and therefore not yet ready to be used in production and any consequences deriving from such usage will not be at ST charge. In no event, ST will be liable for any customer usage of these engineering samples in production. ST Quality has to be contacted prior to any decision to use these Engineering Samples to run qualification activity. YA_FP_V1 7.10 4.40 0.25 0.25 6.25 1.35 0.40 0.65 1.35 1 20 11 10 MS37768V1 Product identification (1) Pin 1 identifier Revision code Date code YWW R Standard ST logo 8S003F3P6 |
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