ZSC31015EEG1-R datasheet(19/53 Pages) RENESAS

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November 14, 2016

ZSC31015 Datasheet

The Voltage Reference Block uses the absolute reference voltage provided by the bandgap to produce two

regulated on-chip voltage references. A 1V reference is used for the output DAC high reference when the part is

configured in 0-1V Analog Output Mode. For this reason, the 1V reference must be very accurate and includes

trim so that its value can be trimmed within +/- 3mV of 1.00V. The 1V reference is also used as the on-chip

reference for the JFET regulator block. The regulation set point of the JFET regulator can be fine-tuned using the

1V trim.

The reference trim setting is selected with the 1V_Trim/JFET_Trim bits in EEPROM. See Table 3.5 for bit

locations. Table 2.1 shows the order of trim codes with 0111 for the lowest reference voltage and 1000 for the

highest reference voltage.

Important: Optimal reference trim is determined during wafer-level testing and final package testing. Back-up

copies of these bits are stored in bits in the CUST_ID0 bits for applications requiring accurate references. In this

case, see section 5 for important notes and instructions for verifying the integrity of the 1V_Trim/JFET_Trim bits

and if necessary, restoring the value from the CUST_ID0 bits before calibration.

Table 2.1

1V Reference Trim (1V vs. Trim for Nominal Process Run)

Order

1Vref/

5Vref_trim3

1Vref/

5Vref_trim2

1Vref/

5Vref_trim1

1Vref/

5Vref_trim0

Highest Reference Voltage

…

Lowest Reference Voltage

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