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ZSC31015EAG1-R Scheda tecnica(PDF) 44 Page - Renesas Technology Corp

Il numero della parte ZSC31015EAG1-R
Spiegazioni elettronici  RBicdLite??Analog Output Sensor Signal Conditioner with Diagnostic Features
PDF  53 Pages
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Produttore elettronici  RENESAS [Renesas Technology Corp]
Homepage  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

ZSC31015EAG1-R Scheda tecnica(HTML) 44 Page - Renesas Technology Corp

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© 2016 Integrated Device Technology, Inc
44
November 14, 2016
ZSC31015 Datasheet
2
1
5
6
7
8
3
4
ZSC31015
Bsink
VBP
ExtTemp
VBN
VSS
Sig
TM
VDD
Vgate
0.1
F
Vsupply
Ground
+5.0 to +5.5 V
OUT
Optional Bsink
S
D
J107 Vishay
4.3.
Three-Wire Ratiometric Output with Over-Voltage Protection
The figure below shows an application circuit for a ratiometric output configuration with temperature compensation
via an internal diode. In this application, the JFET is used for voltage protection. JFET_cfg (16:15) in the
EEPROM are configured to 5.5V. There is an additional maximum error of 8mV caused by the non-zero rds(on) of
the limiter JFET.
Figure 4.3
Ratiometric Output, Temperature Compensation via Internal Diode
4.4.
Digital Output
For all three circuits, the output signal can also be digital. Depending on the output select bits, the bridge signal or
the bridge signal and temperature signal are sent. For the digital output, no load resistor or load capacity is
necessary. No pull down resistor is allowed. If a line resistor or pull-up resistor is used, the requirement for the
rise time must be met (< 5
s). The ZSC31015 output includes an internal pull up resistor of about 30 k. The
digital output can easily be read by firmware from a microcontroller, and IDT can provide the customer with
software for developing the interface.
4.5.
Output Resistor/Capacitor Limits
The limits for external components depend on the programmed output mode:
 Pure Analog Output Mode (calibration is done before): The only limit is the minimum load resistance of 5 k.
 Pure Digital Output Mode with end-of-line calibration: The RC time constant of the ZACwire™ line must have
a rise time < 5 µs.
 Analog output with digital communication during calibration: The RC time constant of the ZACwire™ line must
have a rise time < 5 µs.
Warning: Any series line resistance forms a voltage divider in conjunction with the pull-up load device. If a series
line resistance is needed, choose a low value relative to the pull-up load device.



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