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PRT2011CVL5A Scheda tecnica(PDF) 46 Page - NXP Semiconductors |
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PRT2011CVL5A Scheda tecnica(HTML) 46 Page - NXP Semiconductors |
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46 / 112 page ![]() i.MX RT1064 Crossover Processors Data Sheet for Consumer Products, Rev. 2, 08/2020 46 NXP Semiconductors Electrical Characteristics Figure 17. SEMC input timing in ASYNC mode 4.5.1.2.2 SEMC input timing in SYNC mode Table 35 and Table 36 show SEMC input timing in SYNC mode. Figure 18 shows the input timing in SYNC mode. Table 35. SEMC input timing in SYNC mode (SEMC_MCR.DQSMD = 0x0) Symbol Parameter Min. Max. Unit Comment TIS Data input setup 8.67 — ns — TIH Data input hold 0 — ns Table 36. SEMC input timing in SYNC mode (SEMC_MCR.DQSMD = 0x1) Symbol Parameter Min. Max. Unit Comment TIS Data input setup 0.6 — ns — TIH Data input hold 1 — ns |
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