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ADRF5024BCCZN-R7 Scheda tecnica(PDF) 8 Page - Analog Devices |
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ADRF5024BCCZN-R7 Scheda tecnica(HTML) 8 Page - Analog Devices |
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8 / 13 page ![]() ADRF5024 Data Sheet Rev. C | Page 8 of 13 INPUT POWER COMPRESSION AND THIRD-ORDER INTERCEPT VDD = 3.3 V, VSS = −3.3 V, VCTRL = 0 V or VDD, and TCASE = 25°C for a 50 Ω system, unless otherwise noted. All of the large signal performance parameters were measured on the evaluation board. 10 12 14 16 18 20 22 24 26 28 30 0 5 10 15 20 25 30 35 40 FREQUENCY (GHz) Figure 13. Input P1dB vs. Frequency 20 25 30 35 40 45 50 55 60 0 5 10 15 20 25 30 35 40 FREQUENCY (GHz) Figure 14. Input IP3 vs. Frequency 10 12 14 16 18 20 22 24 26 28 30 10k 100k 1M 10M 100M 1G FREQUENCY (Hz) Figure 15. Input P1dB vs. Frequency (Low Frequency Detail) 20 25 30 35 40 45 50 55 60 10k 100k 1M 10M 100M 1G FREQUENCY (Hz) Figure 16. Input IP3 vs. Frequency (Low Frequency Detail) |
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