ADRF6821 datasheet(2/61 Pages) AD

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ADRF6821

Data Sheet

Rev. A | Page 2 of 61

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications....................................................................................... 1

General Description ......................................................................... 1

Functional Block Diagram .............................................................. 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

System Specifications................................................................... 4

DSA and RF Input Switch Specifications .................................. 5

PLL/VCO Specifications.............................................................. 6

Digital Logic Specifications......................................................... 7

Serial Peripheral Interface (SPI) Timing Specifications.......... 8

Absolute Maximum Ratings............................................................ 9

Thermal Resistance ...................................................................... 9

ESD Caution.................................................................................. 9

Pin Configuration and Function Descriptions........................... 10

Typical Performance Characteristics ........................................... 12

Phase-Locked Loop (PLL) Performance ................................. 17

Theory of Operation ...................................................................... 20

RF Input Switch .......................................................................... 20

Balun ............................................................................................ 21

RF Attenuator ............................................................................. 21

Active Mixer................................................................................ 21

I and Q Polarity .......................................................................... 21

Low-Pass Filters (LPF) and IF Amplifiers............................... 21

LO Generation Block................................................................. 21

Serial Peripheral Interface (SPI)............................................... 24

Applications Information .............................................................. 25

Basic Connections...................................................................... 25

Low-Pass Filter Bandwidth Selection ...................................... 28

I/Q Output Loading................................................................... 29

Analog-to-Digital Converter (ADC) Interfacing................... 29

Image Rejection.......................................................................... 31

Power Supply Configuration..................................................... 32

Layout .......................................................................................... 34

Outline Dimensions....................................................................... 61

Ordering Guide .......................................................................... 61

REVISION HISTORY

8/2018—Rev. 0 to Rev. A

Changed VCC_AMP_I Pin and VCC_MIX_I Pin to

VCC_IFMIX_I Pin........................................................ Throughout

Changed VCC_MIX_Q Pin and VCC_AMP_Q Pin to

VCC_IFMIX_Q Pin ..................................................... Throughout

Changes to Figure 3........................................................................ 10

Changes to Figure 62...................................................................... 32

Updated Outline Dimensions....................................................... 62

5/2017—Revision 0: Initial Version

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