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STM32H723VG Scheda tecnica(PDF) 184 Page - STMicroelectronics

Il numero della parte STM32H723VG
Spiegazioni elettronici  32-bit Arm® Cortex®-M7 550 MHz MCU, up to 1 MB Flash memory, 564 KB RAM, 35 comms peripherals and analog interfaces
PDF  227 Pages
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Produttore elettronici  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
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STM32H723VG Scheda tecnica(HTML) 184 Page - STMicroelectronics

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Electrical characteristics
STM32H723xE/G
184/227
DS13313 Rev 2
6.3.32
Camera interface (DCMI) timing specifications
Unless otherwise specified, the parameters given in Table 98 for DCMI are derived from
tests performed under the ambient temperature, fHCLK frequency and VDD supply voltage
summarized in Table 12: General operating conditions, with the following configuration:
•
DCMI_PIXCLK polarity: falling
•
DCMI_VSYNC and DCMI_HSYNC polarity: high
•
Data formats: 14 bits
•
Capacitive load CL=30 pF
•
Measurement points are done at CMOS levels: 0.5VDD
•
VOS level set to VOS0
Figure 43. DCMI timing diagram
Table 98. DCMI characteristics(1)
1. Guaranteed by characterization results.
Symbol
Parameter
Min
Max
Unit
-
Frequency ratio DCMI_PIXCLK/fHCLK
-0.4
-
DCMI_PIXCLK
Pixel Clock input
-
110
MHz
Dpixel
Pixel Clock input duty cycle
30
70
%
tsu(DATA)
Data input setup time
2
-
ns
th(DATA)
Data hold time
1
-
tsu(HSYNC),
tsu(VSYNC)
DCMI_HSYNC/ DCMI_VSYNC input setup time
2
-
th(HSYNC),
th(VSYNC)
DCMI_HSYNC/ DCMI_VSYNC input hold time
1
-
MS32414V2
DCMI_PIXCLK
tsu(VSYNC)
tsu(HSYNC)
DCMI_HSYNC
DCMI_VSYNC
DATA[0:13]
1/DCMI_PIXCLK
th(HSYNC)
th(HSYNC)
tsu(DATA) th(DATA)



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