MCP6V69 datasheet(21/46 Pages) MICROCHIP

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 2019 Microchip Technology Inc.

DS20006266A-page 21

MCP6V66/6U/7/9

4.3.7

GAIN PEAKING

Figure 4-10 shows an op amp circuit that represents

noninverting amplifiers (VM is a DC voltage and VP is

the input) or inverting amplifiers (VP is a DC voltage

and VM is the input). The CN and CG capacitances

represent the total capacitance at the input pins; they

include

the

amp’s

Common

Mode

Input

Capacitance (CCM), board parasitic capacitance and

any capacitor placed in parallel. The CFP capacitance

represents the parasitic capacitance coupling the

output and noninverting input pins.

FIGURE 4-10:

Amplifier with Parasitic

Capacitance.

CG acts in parallel with RG (except for a gain of +1 V/V),

which causes an increase in gain at high frequencies.

CG also reduces the phase margin of the feedback

loop, which becomes less stable. This effect can be

reduced by either reducing CG or RF||RG.

CN and RN form a low-pass filter that affects the signal

at VP. This filter has a single real pole at 1/(2πRNCN).

The largest value of RF that should be used depends

on noise gain (see GN in Section 4.3.5 “Capacitive

Loads”), CG and the open-loop gain’s phase shift. An

approximate limit for RF is:

EQUATION 4-2:

Some applications may modify these values to reduce

either output loading or gain peaking (step-response

overshoot).

At high gains, RN needs to be small in order to prevent

positive feedback and oscillations. Large CN values

can also help.

4.3.8

REDUCING UNDESIRED NOISE

AND SIGNALS

Reduce undesired noise and signals with:

• Low bandwidth signal filters:

- Minimize random analog noise

- Reduce interfering signals

• Good PCB layout techniques:

- Minimize crosstalk

- Minimize parasitic capacitances and

inductances that interact with fast switching

edges

• Good power supply design:

- Isolation from other parts

- Filtering of interference on supply line(s)

4.3.9

SUPPLY BYPASSING AND

FILTERING

With this family of operational amplifiers, the power

supply pin (VDD for single supply) should have a local

bypass capacitor (i.e., 0.01 µF to 0.1 µF) within 2 mm

of the pin for good high-frequency performance.

These parts also need a bulk capacitor (i.e., 1 µF or

larger) within 100 mm to provide large, slow currents.

This bulk capacitor can be shared with other low-noise

analog parts.

In some cases, high-frequency power supply noise

(e.g., switched mode power supplies) may cause

undue intermodulation distortion with a DC offset shift;

this noise needs to be filtered. Adding a small resistor

into the supply connection can be helpful.

4.3.10

PCB DESIGN FOR DC PRECISION

In order to achieve DC precision on the order of ±1 µV,

many physical errors need to be minimized. The design

of the Printed Circuit Board (PCB), the wiring and the

thermal environment have a strong impact on the

precision achieved. A poor PCB design can easily be

more than 100 times worse than the MCP6V66/6U/7/9

op amps’ minimum and maximum specifications.

4.3.10.1

PCB Layout

Any time two dissimilar metals are joined together, a

temperature-dependent voltage appears across the

junction (the Seebeck or thermojunction effect). This

effect is used in thermocouples to measure

temperature.

The

following

are

examples

thermojunctions on a PCB:

• Components (resistors, op amps, …) soldered to

a copper pad

• Wires mechanically attached to the PCB

• Jumpers

• Solder joints

•PCB vias

VOUT

MCP6V6X

CFP

RF 10 k

3.5 pF

--------------- GN2





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