MCP47FVB21 datasheet(50/92 Pages) MICROCHIP

50 / 92 page

MCP47FVBXX

DS20005405A-page 50

 2015 Microchip Technology Inc.

6.9

Entering High-Speed (HS) Mode

The I2C specification requires that a High-Speed mode

device must be ‘activated’ to operate in High-Speed

(3.4 Mbit/s) mode. This is done by the master sending

a special address byte following the Start bit. This byte

is referred to as the High-Speed Master Mode Code

(HSMMC).

The device can now communicate at up to 3.4 Mbit/s

on SDA and SCL lines. The device will switch out of the

HS mode on the next Stop condition.

The master code is sent as follows:

Start condition (S)

High-Speed Master Mode Code (0000 1XXX),

The XXX bits are unique to the High-Speed (HS)

mode master.

No Acknowledge (A)

After switching to the High-Speed mode, the next

transferred byte is the I2C control byte, which specifies

the device to communicate with, and any number of

data bytes plus acknowledgments. The master device

can then either issue a Repeated Start bit to address a

different device (at High-Speed) or a Stop bit to return

to Fast/Standard bus speed. After the Stop bit, any

other master device (in a multi-master system) can

arbitrate for the I2C bus.

The MCP47FVBXX device does not acknowledge the

HS Select byte. However, upon receiving this com-

mand, the device switches to HS mode.

See Figure 6-3 for illustration of HS mode command

sequence.

For more information on the HS mode, or other I2C

modes, please refer to the NXP I2C specification.

6.9.1

SLOPE CONTROL

The slope control on the SDA output is different

between the Fast/Standard Speed and the High-Speed

clock modes of the interface.

6.9.2

PULSE GOBBLER

The pulse gobbler on the SCL pin is automatically

adjusted to suppress spikes <10 ns during HS mode.

FIGURE 6-3:

HS Mode Sequence.

‘0000 1XXX’b

‘Slave Address’

A/A

“Data”

S = Start bit

Sr = Repeated Start bit

A = Acknowledge bit

A = Not Acknowledge bit

R/W = Read/Write bit

R/W

P = Stop bit (Stop condition terminates HS Mode)

F/S-mode

HS-mode

HS-mode continues

F/S-mode

‘Slave Address’ R/W

HS Select Byte

Control Byte

Command/Data Byte(s)

Control Byte

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