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PIMXRT406LCVN4A Scheda tecnica(PDF) 4 Page - NXP Semiconductors |
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PIMXRT406LCVN4A Scheda tecnica(HTML) 4 Page - NXP Semiconductors |
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4 / 71 page ![]() i.MX RT1015 Crossover Processors Data Sheet for Industrial Products, Rev. 2, 03/2021 4 NXP Semiconductors i.MX RT1015 introduction • Bus Encryption Engine (BEE) — AES-128, ECB, and CTR mode — On-the-fly QSPI Flash decryption • True random number generation (TRNG) • Secure Non-Volatile Storage (SNVS) — Secure real-time clock (RTC) — Zero Master Key (ZMK) • Secure JTAG Controller (SJC) NOTE The actual feature set depends on the part numbers as described in Table 1. Functions such as display and camera interfaces, connectivity interfaces, and security features are not offered on all derivatives. 1.2 Ordering information Table 1 provides examples of orderable part numbers covered by this data sheet. Figure 1 describes the part number nomenclature so that characteristics of a specific part number can be identified (for example, cores, frequency, temperature grade, fuse options, and silicon revision). The primary characteristic which describes which data sheet applies to a specific part is the temperature grade (junction) field. Table 1. Ordering information Part Number Feature Package Junction Temperature Tj (C) MIMXRT1015CAF4A Features supports: • 396 MHz, industrial grade for general purpose • 128K RAM • USB OTG x1 • SAI x3 • SPDIF x1 • General Purpose Timer x2 •PWM x1 •UART x4 •I2C x2 • SPI x2 •ADC x1 • MQS x1 • FlexIO x1 •QTimer x1 •ENC x1 • DCDC • TRNG x1 • Quad-SPI x1 • WDOG x4 • Security RTC • 57 GPIOs 14 x 14 mm, 0.5 mm pitch, 100-pin LQFP -40 to +105 |
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