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K32L2AX Scheda tecnica(PDF) 47 Page - NXP Semiconductors |
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K32L2AX Scheda tecnica(HTML) 47 Page - NXP Semiconductors |
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47 / 96 page ![]() 7.2.5.1 Diagram: Typical IDD_RUN operating behavior The following data was measured under these conditions: • SCG is configured as SPLL mode with SOSC as the clock source for RUN mode current measurement, and as SIRC mode for VLPR mode current measurement • USB regulator disabled • No GPIOs toggled • Code execution from flash with cache enabled • For the ALLOFF curve, all peripheral clocks are disabled except FTFA • For the ALLON curve, all peripheral clocks are enabled as specified in notes of Power consumption operating behaviors. Figure 7. Run mode supply current vs. core frequency General K32 L2A Microcontroller with 512 KB Flash and 128 KB SRAM, Rev. 3, 02/2021 47 NXP Semiconductors |
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