PIMXRT406LCVL4A datasheet(36/71 Pages) NXP

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i.MX RT1015 Crossover Processors Data Sheet for Consumer Products, Rev. 2, 03/2021

NXP Semiconductors

Electrical characteristics

Figure 14. Trace data specifications

4.5

External memory interface

The following sections provide information about external memory interfaces.FlexSPI parameters

Measurements are with a load 15 pf and input slew rate of 1 V/ns.

4.5.1

FlexSPI input/read timing

There are four sources for the internal sample clock for FlexSPI read data:

•

Dummy read strobe generated by FlexSPI controller and looped back internally

(FlexSPIn_MCR0[RXCLKSRC] = 0x0)

•

Dummy read strobe generated by FlexSPI controller and looped back through the

DQS pad (FlexSPIn_MCR0[RXCLKSRC] = 0x1)

•

Read strobe provided by memory device and input from DQS pad

(FlexSPIn_MCR0[RXCLKSRC] = 0x3)

The following sections describe input signal timing for each of these four internal sample clock sources.

4.5.1.0.1

SDR mode with FlexSPIn_MCR0[RXCLKSRC] = 0x0, 0x1

Table 29. FlexSPI input timing in SDR mode where FlexSPIn_MCR0[RXCLKSRC] = 0X0

Symbol

Parameter

Min

Max

Unit

—

Frequency of operation

—

MHz

TIS

Setup time for incoming data

8.67

—

TIH

Hold time for incoming data

—

Table 30. FlexSPI input timing in SDR mode where FlexSPIn_MCR0[RXCLKSRC] = 0X1

Symbol

Parameter

Min

Max

Unit

—

Frequency of operation

—

133

MHz

TIS

Setup time for incoming data

—

TIH

Hold time for incoming data

—

ARM_TRACE_CLK

ARM_TRACE0-3

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