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PIMXRT406LCAF4A Scheda tecnica(PDF) 23 Page - NXP Semiconductors |
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PIMXRT406LCAF4A Scheda tecnica(HTML) 23 Page - NXP Semiconductors |
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23 / 71 page ![]() Electrical characteristics i.MX RT1015 Crossover Processors Data Sheet for Industrial Products, Rev. 2, 03/2021 NXP Semiconductors 23 For additional information, see the i.MX RT1015 Reference Manual (IMXRT1015RM). 4.2.2.2.4 DCDC DCDC can be configured to operate on power-save mode when the load current is less than 50 mA. During the power-save mode, the converter operates with reduced switching frequency in PFM mode and with a minimum quiescent current to maintain high efficiency. DCDC can detect the peak current in the P-channel switch. When the peak current exceeds the threshold, DCDC will give an alert signal, and the threshold can be configured. By this way, DCDC can roughly detect the current loading. DCDC also includes the following protection functions: • Over current protection. In run mode, DCDC shuts down when detecting abnormal large current in the P-type power switch. In power save mode, DCDC stop charging inductor when detecting large current in the P-type power switch. The threshold is also different in run mode and in power save mode: the former is 1 A–2A, and the latter is 200 mA–250 mA. • Over voltage protection. DCDC shuts down when detecting the output voltage is too high. • Low voltage detection. DCDC shuts down when detecting the input voltage is too low. For additional information, see the i.MX RT1015 Reference Manual (IMXRT1015RM). 4.2.3 PLL’s electrical characteristics This section provides PLL electrical characteristics. 4.2.3.1 Audio/Video PLL’s electrical parameters 4.2.3.2 System PLL Table 14. Audio/video PLL’s electrical parameters Parameter Value Clock output range 650 MHz –1.3 GHz Reference clock 24 MHz Lock time < 11250 reference cycles Table 15. System PLL’s electrical parameters Parameter Value Clock output range 528 MHz PLL output Reference clock 24 MHz Lock time < 11250 reference cycles |
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